Call for Papers
  TACS-2: Second Workshop on Temperature-Aware Computer Systems
                        Sunday, June 5, 2005
Held in conjunction with ISCA-32, Madison, WI, USA, June 4-8, 2005


Important Dates:

Submission deadline: April 4, 2005
Author notification: May 3, 2005
Final manuscripts: May 20, 2005


Many analysts suggest that increasing power density and resulting
difficulties in managing on-chip temperatures are some of the most
urgent obstacles to continued scaling of VLSI systems within the next
five to ten years. Just as has been done before for power-aware
computing, "temperature-aware" computing must be approached not just
from the packaging and circuit-design communities, but also from the
processor- and systems- architecture communities. Many techniques for
managing operating temperature will use power-management techniques,
but possibly in different ways than for energy efficiency. There is
growing interest in cooling solutions from the processor- and
systems-architecture domains, as evidenced by recent work on fetch
throttling, dynamic voltage scaling, and process scheduling in
response to thermal stress; and some progress has been made on
modeling infrastructure for this kind of research. But research so far
has only scratched the surface of what is possible. This topic area
presents a wide-open field for new research, with lots of "low-hanging
fruit", and interesting opportunities for wide-ranging
inter-disciplinary work.

This workshop will serve as a forum to explore a broad spectrum of
topics pertaining to temperature-aware computer systems, for
researchers from multiple fields to exchange ideas and initiate
collaborations, and to continue establishing temperature-aware
computing as an important research topic in its own
right. Conributions from all aspects of temperature-aware design are
encouraged, related topics like reliability, leakage, thermal sensors,
etc.

We especially encourage submissions involving collaboration between
architects and thermal engineers! In fact, the goal of this workshop
is to stimulate the widest possible collaboration among architects and
other engineers on topics related to temperature-aware design.

This is the second year of the TACS workshop. Last year's TACS, held
in conjunction with ISCA-31, was extremely successful, with good
attendance, four strong papers covering diverse topics, an exciting
keynote speech by Luiz Barroso of Google, and a vigorous panel
discussion.


Organizers:

Kevin Skadron, Univ. of Virginia Dept. of Computer Science
David Brooks, Harvard Division of Engineering and Applied Sciences

Program Committee:

Kaveh Azar, Q Advanced Thermal Solutions, Inc.
Frank Bellosa, Univ. of Karlsruhe
David Copeland, Sun Microsystems
Jos? Gonz?lez, Intel Barcelona Research Center
Steve Gunther, Intel
Herve Jaouen, ST Microelectronics, Crolles, France
Avi Mendelson, Intel Israel
Li-Shiuan Peh, Princeton Univ.
Jude Rivers, IBM TJ Watson
M. Nabil Sabry, Univ. Fran?aise d'Egypte
Mircea Stan, Univ. of Virginia

Please send questions to: skadron |at| cs DOT virginia DOT edu